Transparent bitstream

An explanation of the standards, their characteristics including pinouts and how the interfaces are generally used in practice.


The FarSync adapters can be run in Transparent Mode, also call bitstream mode. Transparent Mode disables zero insertion and deletion, CRC generation and checking, abort generation, and opening/closing flag generation. Generally for data transmission the application should continuously supply data at a sufficient rate for the line speed so that there are no breaks in transmission. For data reception the application should provide empty buffers at a sufficient rate for the line speed to ensure that no received data is lost. The FarSync drivers provide considerable buffering to overcome reductions in the data supply due to application rescheduling.

The communications hardware transmits data exactly as it is loaded in the transmit FIFO, when the transmitter has no more data to send it transmits mark idle, no abort sequence is sent. Abort has no meaning in Transparent Mode as all one’s is as valid as any other data sequence. Transparent Mode is useful for transmitting and receiving raw data streams such as MPEG video and audio such as T-DMB (Digital Multimedia Broadcasting) and DAB (Digital Audio Broadcasting) ETI (Ensemble Transport Interface – ETSI EN 300 799) and STI (Service Transport Interface – ETSI EN 300 797).

Many of the less common protocols for which hardware support is not commonly available can be handled in transparent mode with software handling the encoding and decoding of the particular frame format. Particularly handy for support of legacy protocols.

Transparent mode also disables the receive byte counter; therefore, short frame and long frame errors are not reported.

Receive data may not be byte aligned, as the receiver knows nothing of the data format or any synchronising sequences. If receive data needs to be byte aligned then this can be achieved in software on the Host PC.

The FarSync adapters normally send and receive the LSB of a byte first, this is however configurable to MSB if required. When receiving transparent data, no buffer status is transferred to the buffer descriptors by the SmartDMA. The received data is simply a continuous data stream filling buffers, and the SmartDMA controller keeps cycling through buffers without ever storing an EOP. The receiver will begin receiving as soon as the port is started. It will continue receiving as long as there are buffers available in the receive buffer ring. Each receive block is as big as the buffer allocated for it. If the receive data is marking, then the receive buffers just keep being filled with 0xFF’s until there are no buffers available or the port is stopped.

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