An explanation of the standards, their characteristics including pinouts and how the interfaces are generally used in practice.
HDLC frames use flags to determine the beginning and end of a frame. These flags – 01111110 (or 0x7E) provide frame synchronisation. One flag may be used as both an end flag for one frame and the start flag for the next frame. Although FarSync adapters do not transmit such shared flags, they can receive and correctly handle them.
An HDLC frame typically consists of an opening flag, followed by an address field, a control field, an information field (the data payload), a cyclic redundancy check (CRC) field, and, finally, a closing flag.
Flag | Address Field | Control field | Information field | Frame Check Sequence | Flag
As far as the FarSync driver is concerned the address, control and information fields are just data.
Frames maintain data transparency by a process called zero-insertion and deletion. To ensure transparency, a 0 bit is inserted by the transmitter after 5 continuous 1s within the frame contents, and removed by the receiver whenever it detects 5 continuous 1s followed by a 0. This prevents data within the frame being confused with the flags, and is known as bit-stuffing, unstuffing and also ZBID.
Normal frames are terminated with a flag – any frame which terminates with 7 1s or more is assumed to be aborted, and discarded. The transmitter can deliberately abort a frame if it chooses – this can sometimes happen if frames need to be re-transmitted, and the transmitter knows that the frame currently being sent will be discarded by the receiver.
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